FIG. 1 illustrates a typical data latch 100 formed of a pair of inverters 102 and 104 cross coupled between nodes 106 and 108. Node 106 is coupled to a data input 110 via an inverter 112, while node 108 is coupled to a data output 114 via an inverter 116. The inverters 104 and 112 are each clocked by a clock signal CP and its inverse clock signal CP.
An example of the transistors forming inverters 102 and 104 is illustrated in FIG. 1. Inverter 102 comprises a P-channel MOS (PMOS) transistor 118 and an N-channel MOS (NMOS) transistor 120 coupled in series between a supply voltage VDD and ground, and having their gate nodes coupled to node 106 and their drain nodes coupled to node 108. Similarly, inverter 104 comprises a PMOS transistor 122 and an NMOS transistor 124 having their gate nodes coupled to node 108 and their drain nodes coupled to node 106. The source of transistor 122 is coupled to the supply voltage VDD via a further PMOS transistor 126, which receives at its gate node the inverse clock signal CP. The source of transistor 124 is coupled to ground via a further NMOS transistor 128, which receives at its gate node the clock signal CP.
In operation, when the clock signal CP is low, the latch 100 is in a write mode, in which the data signal is coupled to node 106, and inverter 104 is isolated by the deactivation of transistors 126 and 128, such that the high or low value of the data is stored at node 106, and the inverse of this data value is stored at node 108. When the clock signal CP is high, the latch 100 is in a data retention mode, in which inverter 112 is deactivated, and the transistors 126 and 128 of inverter 104 are activated in order to maintain the programmed state at node 106.
In the retention mode, the latch 100 should maintain its programmed state. However, certain types of radiation may induce a parasitic current in one of the inverters 102, 104 that can cause the binary state of the latch to flip. For example, α radiation hitting one of the transistors of inverter 102 or 104 may induce such a current.
α radiation generally originates from impurities contained in the housing of the integrated circuit, and one solution for protecting latches is to modify the housing to remove the impurities. However, such a solution is relatively costly. Alternative solutions have been proposed that involve duplicating the inverters in the latch, but such solutions greatly increase the number of transistors of the latch, and in particular the number of transistors in the data path. This leads to relatively high energy consumption and reduced speed.